McPAT is an architectural modeling tool for chip multiprocessors (CMP). The main focus of McPAT is accurate power and area modeling, and a target clock rate is used as a design constraint. McPAT performs automatic extensive search to find optimal designs that satisfy the target clock frequency.

Computer architecture

High Performance Computing

Repository

https://github.com/uwsampa/mcpat

FireSim is an open-source FPGA-accelerated full-system hardware simulation platform that makes it easy to validate, profile, and debug RTL hardware implementations at 10s to 100s of MHz.

Computer architecture

High Performance Computing

Repository

https://github.com/firesim/firesim

GPGPU-Sim is a cycle-level simulator modeling contemporary graphics processing units (GPUs) running GPU computing workloads written in CUDA or OpenCL.

Computer architecture

High Performance Computing

Repository

https://github.com/gpgpu-sim/gpgpu-sim_distribution

SimCXL is a full-system, cycle-level simulator based on gem5 that provides complete support for all three CXL sub-protocols and all three types of CXL devices.

Computer architecture

High Performance Computing

Repository

https://github.com/TianheMICALab/SimCXL

The gem5 simulator is a modular platform for computer-system architecture research, encompassing system-level architecture as well as processor microarchitecture. It is primarily used to evaluate new hardware designs, system software changes, and compile-time and run-time system optimizations.

Computer architecture

High Performance Computing

Repository

https://github.com/gem5/gem5